1. Field of the Invention
The present invention relates to electrical circuits, and, in particular, to variable-gain amplifiers.
2. Description of the Related Art
Variable-gain amplifiers (VGAs) are often implemented using multiple amplifier stages connected in series, where each successive amplifier stage further amplifies the output from the previous amplifier stage. As indicated by its name, a VGA can be operated over a range of different gain settings, where each amplifier stage contributes, e.g., proportionately, to the overall amplifier gain.
In such a multi-stage VGA, deviations from ideal operations can result from voltage offsets that can occur at both the input and the output of each amplifier stage, where the input and output offset levels can be independent from each other and also independent from the offsets at different stages. These offsets can result from process variations during fabrication/manufacturing as well as from changes in operating conditions such as age, temperature, humidity, and the like.
One conventional technique for compensating multi-stage VGAs for these input and output offsets relies on AC-coupling and zero-forcing during squelch intervals. One disadvantage of this technique is that a relatively long squelch interval (e.g., about 50–100 nanosec) is typically required, during which time the amplifier is not available for signal processing of user data. As a result, analog storage of the offset compensation is required. Moreover, zero-forcing involves the use of a high-gain, low-offset, high-speed auxiliary amplifier, which typically increases the cost, size, and complexity of the VGA.